I486tm Microprocessor

1.0 Table of Contents – Pinout – Brief Pin Descriptions – 2.0 Architectural Overview – 2.1 Register Set – 2.2 Instruction Set – 2.3 Memory Organization – 2.4 I/O Space – 2.5 Addressing Modes – 2.6 Data Formats – 2.7 Interrupts – 3.0 Real Mode Architecture – 3.1 Real Mode Introduction – 3.2 Memory Addressing – 3.3 Reserved Locations – 3.4 Interrupts – 3.5 Shutdown And Halt – 4.0 Protected Mode Architecture – 4.1 Introduction – 4.2 Adressing Mechanism – 4.3 Segmentation – 4.4 Protection – 4.5 Paging – 4.6 Virtual 8086 Environment – 5.0 On-Chip Cache – 5.1 Cache Organization – 5.2 Cache Control – 5.3 Cache Line Fills – 5.4 Cache Line Invalidations – 5.5 Cache Replacement – 5.6 Page Cacheability – 5.7 Cache Flushing – 5.8 Caching Translation Lookaside Buffer Entries – 6.0 Hardware Interface – 6.1 Introduction – 6.2 Signal Description – 6.3 Write buffers – 6.4 Interrupt And Non-Maskable Interrupt Interface – 6.5 Reset and Initialization – 7.0 Bus Operation – 7.1 Data Transfer Mechanism – 7.2 Bus Functional Description – 8.0 Testability – 8.1 Built-in Self Test (Bist) – 8.2 On-chip Cache Testing – 8.3 Translation Lookaside Buffer (TLB) Testing – 8.4 Tristate Output Test Mode – 9.0 Debbuging Support – 9.1 Breakpoint Instructions – 9.2 Single Step Instructions – 9.3 Debug Registers – 10.0 Instruction Set summary – 10.1 486TM Microprocessor Instruction Encoding and Clock Count Summary – 10.2 Instructing Encoding – 11.0 Differences with the 386TM Microprocessor – 12.0 Electric Data – 12.1 Power and Grounding 12.2 Maximum ratings – 12.3 D.C. Specifications – 12.4 A.C. Specifications – 12.5 Designing for ICD-486 – 13.0 Mechanical data – 13.1 Package Thermal Specifications – 14.0 Revision History

This book shows how to use The i486TM CPU. It offers the highest performance for DOS, OS/2, Windows and UNIX Systems V/386 applications and it is 100 % binary compatible with the 386tm CPU / Este libro muestra cómo usar la CPU i486TM. Ofrece el más alto rendimiento para aplicaciones DOS, OS/2, Windows y UNIX Systems V/386 y es 100% binario compatible con la CPU 386tm.