PCI system architecture / Tom Shanley and Don Anderson

Acknoledgements – About this book – Part I. Introduction to the Local Bus Concept – Chapter 1: the problema – Chapter 2: solutions, VESA and PCI – Part II: Revision 2.1 Essentials – Cahpter 3: Into PCI Bus operation – Chapter 4: Intro to Reflected-Wave Switching – Chapter 5:The Functional Signal Groups – Chapter 6: PCI bus Arbitration – Chapter 7: The commands – Chapter 8: The Read and Write Transfers – Chapter 9. Premature Transaction Termination – Chapter 10. Error Detection and Haldling – Chapter 11: Interrupt-Related Issues – Chapter 12: Shared Resource Acquisition – Chapter 13: The 64-bit PCI Extension – Chapter 14: Add-In Cards and Connectors – Part III: Device Configuration in system with a Single PCI bus – Chapter 15: Intro to Configuration Address Space – Chapter 16: Configuration transactions – Chapter 17: Configuration registers – Chapter 18: Expansion ROMs – Part IV: PCI-to-PCI bridge –Part V: The PCI BIOS – Part VI: PCI Cache Support – Part VII: 66 MhHz PCI Implementation – Part VIII: Overview of VLSI Technology VL82C59x Supercore PCI Chipset – Appendices – Appendix A: Glossary – Appendix B: Resources- Index

This book describes revision 2.1 of the Peripheral Component Interconnect (PCI) bus specification, providing a clear, concise explanation of PCI's relationship to the rest fo the system, This book has been updated and revised to include indepth treatment of PCI to PCI bridges , the PCI BIOS, the 66MHz PCI bus, and more. Este libro describe la revisión 2.1 de la especificación de un bus de interconexión de componentes periféricos (PCI), proporcionando una explicación clara y concisa de la relación de PCI con el resto del sistema. Este libro ha sido actualizado y revisado para incluir un tratamiento en profundidad de los puentes PCI a PCI, el BIOS PCI, el bus PCI de 66 MHz y más.